"Yet another routing / network stack ... made by routing/netwrok engineers ..."
Overview
RARE (Router for Academia, Research & Education) is an ongoing effort under the GÉANT 4th programme which focus on determining if a routing software platform solution can fit R&E use cases. The project aims to integrate different pieces of software related to these building blocks:
- control plane: RARE uses FreeRouter under the hood used as the control plane component
- data plane: (not only P4)
P4behavioural language is used to describe the packet processing behaviour of RARE data plane - and communication interface between the control plane and data plane: Interface compliant to P4Runtime specification ensure this function
A key part of the work consists in enabling a control plane software to pilot a data plane via a programmatic interface.
Resulting work
- Software interface that maps the forwarding state used by a an Open source control plane (FreeRouter)
- to programmable data plane running RARE software
P4 is an example of language proposing an interface that allows data plane programmability.
Note
P4 core language attempts to be as much as possible independent from the target or Programmable Switching ASIC processor architecture. However architecture dependance is still prominent. Code adjustments followed by a target specific compilation is necessary if you want to run your p4 program on a specific architecture.
RARE project includes the following partners under GÉANT GN4-3 programme
Getting started
Select and install a P4 data-plane target platform architecture
Install FreeRouter control-plane
Install RARE software
Build & Run RARE software
Documentation
- Original control plane self-test page: FreeRouter Self-test
- RARE/FreeRtr comprehensive configuration guide: RARE/FreeRtr documentation site
- INTEL/BXD manual TOFINO WEDGE100BF32X installation guide (courtesy of INTEL/BXD approval for publication)
Control plane
FreeRouter
FreeRouter is a free, open source router os process. It speaks routing protocols, and (re)encapsulates packets on interfaces (a huge list of encapsulation and routing test cases can be found under self-test page) since it handles packets itself, it is independent of underlaying os capabilities (optionally, it can export forwarding tables through openflow or p4 to external switch) since it is an unprivilegized process, it receives and sends packets through sockets there are external, privileged processes that place traffic to these sockets (it means that internet can be used as backplane for router processes) the command line tries to mimic the industry standards with one exception: no global routing table: every routed interface must be in a virtual routing table positive side effect: there are no vrf-awareness questions
This control plane supports a tremendous amount of features, in addition FreeRouter lead developer is part of the RARE team, which dramatically increases development effort related to control Plane/data plane interface communication.
Your own custom control plane
You can adapt your own control plane as soon as it is compliant to RARE dataplane P4 interface. It is recommended though to use FreeRouter as it was built and test against it. RARE P4 data plane interface will be published subsequently. For the brave one or people who are in a hurry, just look at bf_forwarder message loop.
Dataplane: P4 targets
- BMv2
BMv2 is the open source P4 switch developed and maintained by the P4Lang p4.org group. It can be downloaded here. It uses the V1Model P4 Switch Architecture depicted below:
- TOFINO target
Similar to BMv2, TOFINO uses the PSA - Portable Switch Architecture. However, while BMv2 is a P4 virtual software switch TOFINO (and his older brother TOFINO 2) is a network processor able to switch packet at tremendous line rate.
While BMv2 is an excellent alternative to learn and develop P4 algorithm, TOFINO & TOFINO 2 open the gate to exciting use cases in real production environment.
More information can be found here.
Software for TOFINO Programmable Switching ASIC is subject to a Software License and Confidentiality Agreement (SLACA)
If you are an R&E organization please submit an application via INTEL/BAREFOOT FASTER portal
- FPGA target
Porting RARE on FPGA is an on-going effort, this target is perfect for enabling RARE/FreeRouter on FPGA card that are produced massively and thus present a very interesting TCO.
- DPDK target
P4 hardware target like TOFINO enable LSR/LER use cases. But in certain context, acquiring P4 hardware for SOHO use cases (primary/secondary schools, small R&E instituions) is financially not possible. In that context, we propose a solution that leverage existing kernel bypass machanism such as DPDK. The resulting work is the creation of p4dpdk which is inherently an emulation of RARE software running on P4 target but written entirely from scratch in C code.
Current status
All the features mentioned below are IPv4/IPv6 compliant. As the project is an on-going work in-progress, the documentation can not reflect all the supported features. The below list is not exhaustive. Please do not hesitate to contact us for more details.
Useful links
RARE project links
P4Lang BMv2 nightly built packages
FreeRouter nightly built packages
- FreeRouter on ubuntu 18.04
- FreeRouter on ubuntu 20.04
- FreeRouter on Debian stable (Debian 10 - buster)
INTEL/BAREFOOT TOFINO packages
Software for TOFINO Programmable Switching ASIC is subject to a Software License and Confidentiality Agreement (SLACA)
If you are an R&E organization please submit an application via INTEL/BAREFOOT FASTER portal
Last but not least ...
FreeRouter control plane
Contact us
- We have also a RARE users mailing list:
- and RARE developers mailing list:
- RARE/freeRouter Twitter contact
Feel free to suscribe !